Field of the Invention
The present invention relates to a pulse transformer and, more particularly, to a surface-mount pulse transformer using a drum-type core.
Description of Related Art
In recent years, in a circuit component such as a connecter, a pulse transformer is widely used for isolating a differential signal at an input side (primary side) and a differential signal at an output side (secondary side). In order to mount a plurality of pulse transformers on a printed circuit board at high density, it is preferable to use a surface-mount pulse transformer using a drum core (see Japanese Patent Application Laid-Open Nos. 2009-302321 and 2010-109267).
A pulse transformer described in the Japanese Patent Application Laid-Open No. 2010-109267 has a configuration in which primary-side terminal electrodes and a secondary-side center tap are formed in one flange, and secondary-side terminal electrodes and a primary-side center tap are formed in the other flange. When a plurality of pulse transformers each having such a configuration are to be mounted on a printed circuit board, there is a need to devise a layout so that withstand voltage between the primary and secondary sides is sufficiently ensured.
FIG. 11A is an exemplary plan view illustrating a state where a common type pulse transformers 11 and 12 are arranged in an X-direction, and FIG. 11B is an exemplary plan view illustrating wiring patterns on a printed circuit board corresponding to the arrangement illustrated in FIG. 11A.
The pulse transformers 11 and 12 illustrated in FIG. 11A have the same shape and structure, and they each have a rectangular shape in a plan view, in which a length in a Y-direction is longer than a length in the X-direction. Symbols P1 and N1 given in FIG. 11A denote a pair of primary-side terminal electrodes, and symbols P2 and N2 denote a pair of secondary-side terminal electrodes. Further, a symbol CT1 denotes a primary-side center tap, and a symbol CT2 denotes a secondary-side center tap. FIG. 11A illustrates the pulse transformers 11 and 12 as viewed from above and transparently illustrates the terminal electrodes positioned at a bottom surface side.
As illustrated in FIG. 11A, the primary-side terminal electrodes P1 and N1 and secondary-side center tap CT2 are disposed in one flange 21, and the secondary-side terminal electrodes P2 and N2 and primary-side center tap CT1 are disposed in the other flange 22. In the flange 21, the primary-side terminal electrode N1 is distanced from the secondary-side center tap CT2 so as to ensure withstand voltage between the primary and secondary sides. Similarly, in the flange 22, the secondary-side terminal electrode P2 is distanced from the primary-side center tap CT1.
When the thus configured pulse transformers 11 and 12 are arranged close to each other in the X-direction, wiring patterns on the printed circuit board have a layout illustrated in FIG. 11B. In FIG. 11B symbols each having a suffix “a” are land patterns to be connected to their corresponding terminal electrodes, and symbols each having a suffix “b” are wiring patterns extending from their corresponding land patterns. Symbols 11R and 12R denote mounted regions of the pulse transformers 11 and 12, respectively.
When the pulse transformers 11 and 12 are arranged close to each other in the X-direction as illustrated in FIG. 11A, a distance between the primary-side terminal electrode P1 of the pulse transformer 11 and secondary-side center tap CT2 of the pulse transformer 12 and a distance between the primary-side center tap CT1 of the pulse transformer 11 and secondary-side terminal electrode N2 of the pulse transformer 12 become very small. Accordingly, as illustrated in FIG. 11B, a distance between the land patterns P1a and CT2a, a distance between the land patterns N2a and CT1a, a distance between the wiring patterns P1b and CT2b, and a distance between the wiring patterns N2b and CT1b become small, making it difficult to ensure sufficient withstand voltage. Typically, in a circuit component of such a type, a clearance to be ensured between the primary side and secondary side is prescribed in the specification, so that a layout illustrated in FIG. 11B is likely to fail to satisfy the specification.
To avoid such a problem, a distance Dx between the two pulse transformers 11 and 12 in the X-direction is increased to some extent, as illustrated in FIG. 12A. As a result, as illustrated in FIG. 12B, the distance between the wiring patterns P1b and CT2b, and distance between the wiring patterns CT1b and N2b can sufficiently be ensured. In this case, however, a region R1 on the printed circuit board becomes a dead space, decreasing use efficiency of the printed circuit board.
Further, as illustrated in FIG. 13A, there can be considered a method in which positions of the flanges 21 and 22 in the configuration illustrated in FIG. 11A or FIG. 12A are interchanged with each other in one pulse transformer. With this configuration, as illustrated in FIG. 13B, the primary sides (or secondary sides) of the two pulse transformers 11 and 12 are adjacently disposed, allowing sufficient withstand voltage to be ensured between the primary and secondary sides. In this case, however, as illustrated in FIG. 13B, a lead-out direction of the primary wiring pattern (P1b and N1b) in the pulse transformer 11 differs from a lead-out direction of the primary wiring pattern (P1b and N1b) in the pulse transformer 12 and, similarly, a lead-out direction of the secondary primary wiring pattern (P2b and N2b) in the pulse transformer 11 differs from a lead-out direction of the secondary wiring pattern (P2b and N2b) in the pulse transformer 12. Specifically, in the pulse transformer 11 at a left side of FIG. 13B, the primary wiring pattern (P1b and N1b) and the secondary wiring pattern (P2b and N2b) are led out downward and upward, respectively; while in the pulse transformer 12 at a right side of FIG. 13B, the primary wiring pattern (P1b and N1b) and the secondary wiring pattern (P2b and N2b) are led out upward and downward, respectively. Thus, a routing distance of the wiring patterns on the printed circuit board is disadvantageously increased, and there is a possibility that a difference in characteristics occurs between a signal passing through the pulse transformer 11 and a signal passing through the pulse transformer 12.
Furthermore, there can be considered a method in which the pulse transformer 12 is two-dimensionally rotated at 90° as illustrated in FIG. 14A. With this configuration, as illustrated in FIG. 14B, the primary sides (or secondary sides) of the two pulse transformers 11 and 12 can be adjacently disposed while the lead-out direction of the primary wiring patterns P1b and N1b can be the same between the pulse transformers 11 and 12, and the lead-out direction of the secondary primary wiring patterns P2b and N2b can be the same between the pulse transformers 11 and 12. In this case, although a distance between the primary-side center tap CT1 of the pulse transformer 11 and secondary center tap CT2 of the pulse transformer 12 becomes small, this does not pose a big problem in a case where the center taps CT1 and CT2 have the same potential (e.g., the same ground potential). In this case, however, a region R2 on the printed circuit board becomes a dead space, decreasing use efficiency of the printed circuit board.
As described above, when a common type pulse transformer having a rectangular shape in a plan view is used, it is difficult to efficiently lay out the plurality of pulse transformers on the printed circuit board while ensuring sufficient withstand voltage between the primary and secondary sides. Therefore, when the common type pulse transformer is used, freedom of layout on the printed circuit board is restricted.